SOC / System Validation Architect

AMD · Bengaluru · 15+ yrs experience · Posted 2026-02-27

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About the role

A successful candidate will work with senior silicon design and validation engineer s. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.
Responsibilities:
- 1. Validation Architecture & Strategy
- Define end‑to‑end SoC validation architecture spanning pre‑silicon (simulation, emulation, FPGA) and post‑silicon validation.
- Drive validation strategy alignment with SoC architecture, use‑cases, and product requirements.
- Architect coverage models (functional, scenario, performance, power, security, RAS).
- Define shift‑left validation methodologies to uncover system issues early.
- 2. Pre‑Silicon Validation Leadership
- Lead validation architecture using: Simulation (UVM‑based, hybrid environments) Emulation / acceleration platforms FPGA‑based prototyping
- Simulation (UVM‑based, hybrid environments)
- Emulation / acceleration platforms
- FPGA‑based prototyping
- Enable system‑level use‑case validation involving CPU, GPU, accelerators, IOs, memory, and fabrics.
- Guide complex cross‑IP and cross‑subsystem debug (RTL, firmware, software interactions).
- 3. Post‑Silicon & Silicon Bring‑Up
- Architect post‑silicon validation frameworks, diagnostics, and automation.
- Drive early silicon bring‑up, debug, and characterization.
- Ensure validation of performance, power, thermals, security, and RAS features.
- Partner with manufacturing and product teams to support production readiness.
- 4. Cross‑Functional Technical Leadership
- Act as a technical authority across validation, influencing design decisions upstream.
- Collaborate with: SoC Architects IP owners Firmware / BIOS teams System software and OS teams
- SoC Architects
- IP owners
- Firmware / BIOS teams
- System software and OS teams
- Represent validation in architecture reviews, tape‑out readiness, and exec forums.
Qualifications:
- 15+ years of experience in SoC validation, or system architecture.
- Deep expertise in SoC validation methodologies (pre‑ and post‑silicon).
- Strong understanding of: CPU/GPU architectures Interconnects and fabrics (NoC) Memory subsystems (DDR, HBM, cache coherency) High‑speed IOs (PCIe, Ethernet, USB, CXL, etc.)
- CPU/GPU architectures
- Interconnects and fabrics (NoC)
- Memory subsystems (DDR, HBM, cache coherency)
- High‑speed IOs (PCIe, Ethernet, USB, CXL, etc.)
- Hands‑on experience with emulation platforms.
- Proven strength in complex system‑level debug across HW/FW/SW boundaries.
- Excellent communication and technical influence skills.
- P REFERRED EXPERIENCE:
- Experience validating server, datacenter, automotive, or high‑performance SoCs. Expertise in RAS, security, and safety validation.
- Experience with production silicon ramp and yield learning. Prior role as technical architect or fellow‑level contributor. Publications, patents, or industry leadership contributions are a plus.
- Experience validating server, datacenter, automotive, or high‑performance SoCs.
- Expertise in RAS, security, and safety validation.
- Experience with production silicon ramp and yield learning.
- Prior role as technical architect or fellow‑level contributor.
- Publications, patents, or industry leadership contributions are a plus.
- Bachelors or Masters degree in computer engineering/Electrical Engineering

Qualifications

- 15+ years of experience in SoC validation, or system architecture.
- Deep expertise in SoC validation methodologies (pre‑ and post‑silicon).
- Strong understanding of: CPU/GPU architectures Interconnects and fabrics (NoC) Memory subsystems (DDR, HBM, cache coherency) High‑speed IOs (PCIe, Ethernet, USB, CXL, etc.)
- CPU/GPU architectures Interconnects and fabrics (NoC)
- Memory subsystems (DDR, HBM, cache coherency)
- High‑speed IOs (PCIe, Ethernet, USB, CXL, etc.)
- Hands‑on experience with emulation platforms.
- Proven strength in complex system‑level debug across HW/FW/SW boundaries.
- Excellent communication and technical influence skills.
- P REFERRED EXPERIENCE:
- Experience validating server, datacenter, automotive, or high‑performance SoCs.
- Expertise in RAS, security, and safety validation.
- Experience with production silicon ramp and yield learning.
- Prior role as technical architect or fellow‑level contributor.
- Publications, patents, or industry leadership contributions are a plus.
- Bachelors or Masters degree in computer engineering/Electrical Engineering

Responsibilities

- Validation Architecture & Strategy
- Define end‑to‑end SoC validation architecture spanning pre‑silicon (simulation, emulation, FPGA) and post‑silicon validation.
- Drive validation strategy alignment with SoC architecture, use‑cases, and product requirements.
- Architect coverage models (functional, scenario, performance, power, security, RAS).
- Define shift‑left validation methodologies to uncover system issues early.
- Pre‑Silicon Validation Leadership
- Lead validation architecture using: Simulation (UVM‑based, hybrid environments) Emulation / acceleration platforms FPGA‑based prototyping
- Simulation (UVM‑based, hybrid environments)
- Emulation / acceleration platforms FPGA‑based prototyping
- Enable system‑level use‑case validation involving CPU, GPU, accelerators, IOs, memory, and fabrics.
- Guide complex cross‑IP and cross‑subsystem debug (RTL, firmware, software interactions).
- Post‑Silicon & Silicon Bring‑Up
- Architect post‑silicon validation frameworks, diagnostics, and automation.
- Drive early silicon bring‑up, debug, and characterization.
- Ensure validation of performance, power, thermals, security, and RAS features.
- Partner with manufacturing and product teams to support production readiness.
- Cross‑Functional Technical Leadership
- Act as a technical authority across validation, influencing design decisions upstream.
- Collaborate with: SoC Architects IP owners Firmware / BIOS teams System software and OS teams SoC Architects IP owners
- Firmware / BIOS teams
- System software and OS teams
- Represent validation in architecture reviews, tape‑out readiness, and exec forums.

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