System IP - uArchitect Staff/Sr Staff Engineer

Qualcomm · Bengaluru · 8+ yrs experience · Posted 2026-05-31

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About the role

Qualcomm India Private Limited
Engineering Group, Engineering Group > Systems Engineering
Responsibilities: - Infra Systems Architect for the next generation System-on-chip (SoC) for smartphones, Compute, AI accelerators and other product categories.
- This position will be responsible for Technical and hands on role mainly for high level architecture and micro-architecture development.
- Building Design prototypes for advance IPs in system infrastructure domain, creating experiments to test proof of concept for algo efficiency, initial analysis on power, area or latency benefits learning various facets of SOC architecture from High-speed Interconnect, Bus Protocols, Memory Technologies, Power Architecture to support different segments of infra solutions
- Working with Performance modelling team to prototype new IP ideas, and with Silicon team to
- analyze prior products and competition
- Guiding Design/DV and engineering teams on high quality IP implementation and successful commercialization, work with SW team for Post Silicon tuning for superior Perf & Power
Qualifications: - 8+ years of experience in IP architecture, micro-architecture and design.
- Good understanding of SOC.
- Possesses expertise in any one of the following technical are as is a plus: DDR, Interconnects, SOC power management, clock/reset, Compression, Encryption, ECC
- Understanding of ARM architecture (Coherency, bus interconnects, Security, arch evolution)
- Good communication and work with minimal supervision
- Collaborate with Perf, Design and System team stakeholders in developing solutions
- Experience with Verilog, logic design principles with timing, area and power implications.
- Experience in testplan development, UVM, will be a great asset
- Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite/CHI.
- Good Understanding of concurrency, bandwidth, latency and system level aspects
- Bachelor's degree in Electrical Engineering required, Master's or Doctorate preferred
- Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 6+ years of Systems Engineering or related work experience.
- Master's degree in Engineering, Information Systems, Computer Science, or related field and 5+ years of Systems Engineering or related work experience.
- PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.

Qualifications

- 8+ years of experience in IP architecture, micro-architecture and design.
- Good understanding of SOC.
- Possesses expertise in any one of the following technical are as is a plus: DDR, Interconnects, SOC power management, clock/reset, Compression, Encryption, ECC
- Understanding of ARM architecture (Coherency, bus interconnects, Security, arch evolution)
- Good communication and work with minimal supervision
- Collaborate with Perf, Design and System team stakeholders in developing solutions
- Experience with Verilog, logic design principles with timing, area and power implications.
- Experience in testplan development, UVM, will be a great asset
- Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite/CHI.
- Good Understanding of concurrency, bandwidth, latency and system level aspects
- Bachelor's degree in Electrical Engineering required, Master's or Doctorate preferred
- Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 6+ years of Systems Engineering or related work experience.
- Master's degree in Engineering, Information Systems, Computer Science, or related field and 5+ years of Systems Engineering or related work experience.
- PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.

Responsibilities

- Infra Systems Architect for the next generation System-on-chip (SoC) for smartphones, Compute, AI accelerators and other product categories.
- This position will be responsible for Technical and hands on role mainly for high level architecture and micro-architecture development.
- Building Design prototypes for advance IPs in system infrastructure domain, creating experiments to test proof of concept for algo efficiency, initial analysis on power, area or latency benefits learning various facets of SOC architecture from High-speed Interconnect, Bus Protocols, Memory Technologies, Power Architecture to support different segments of infra solutions
- Working with Performance modelling team to prototype new IP ideas, and with Silicon team to
- analyze prior products and competition
- Guiding Design/DV and engineering teams on high quality IP implementation and successful commercialization, work with SW team for Post Silicon tuning for superior Perf & Power

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