FPGA Design Technical Leader- Ethernet,PCIe, System Verilog, Xilinx- 12+ Years

Cisco · Bengaluru · 12+ yrs experience · Posted 2026-07-01

Tech stack: Unix

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About the role

We are part of the Common Hardware Group, with our team specializing in FPGA development. Our work spans both sophisticated data-path and challenging control-path FPGAs. The design process includes crafting the FPGA functional specification document, RTL coding, image generation and validation. We leverage industry-standard tools for FPGA design, incorporating various quality metrics to ensure a robust process. Our ultimate goal is to deliver bug-free RTL for first-pass success on the board. Additionally, we collaborate closely with our remote teams based in US and Italy.
Responsibilities:
- Design and implementation of FPGAs.
- Participate in the architecture definition, implementation and verification phases.
- Detailed design specification and test plan development.
- Develop and implement block level RTL, perform synthesis and achieve timing closure.
- Work with multi-functional teams (hardware, software, diagnostics and signal integrity groups).
- Assist in complex subsystem level lab bring-up, integration, and unit test validation.
- Contribution to the design process adoption with in the team.
Qualifications:
- Educational Background: Requires 12+ years of experience in FPGA designs with MTech/BTech in EE/EC domain.
- Experienced in crafting with Xilinx, Altera and Microsemi FPGAs or Proficiency in HDL languages (Verilog, VHDL and System Verilog)
- Hands on experience with FPGA vendor tools like Vivado, Quartus and Libero
- Hands-on experience with Ethernet based protocols, PCIe, AXI, memory controllers, OTN, I2C, SPI, UART etc. Familiarity with simulation flow like UVM and VMM will be an added advantage.
- Basic knowledge on Unix system and script tool.
- Promote continuous improvement in design methodologies and processes
- Lead and mentor junior design engineers, offer technical guidance, and drive successful project execution
- Facilitates/encourages knowledge sharing in the team (e.g., brownbags, demos, design sessions).
- Knowledge on the signal integrity and system bring-up.
- Good English written and verbal communications. Self-motivation, partnership and strong interpersonal skills are needed.

Qualifications

- Educational Background: Requires 12+ years of experience in FPGA designs with MTech/BTech in EE/EC domain.
- Experienced in crafting with Xilinx, Altera and Microsemi FPGAs or
- Proficiency in HDL languages (Verilog, VHDL and System Verilog)
- Hands on experience with FPGA vendor tools like Vivado, Quartus and Libero
- Hands-on experience with Ethernet based protocols, PCIe, AXI, memory controllers, OTN, I2C, SPI, UART etc.
- Familiarity with simulation flow like UVM and VMM will be an added advantage.
- Basic knowledge on Unix system and script tool.
- Promote continuous improvement in design methodologies and processes
- Lead and mentor junior design engineers, offer technical guidance, and drive successful project execution
- Facilitates/encourages knowledge sharing in the team (e.g., brownbags, demos, design sessions).
- Knowledge on the signal integrity and system bring-up.
- Good English written and verbal communications.
- Self-motivation, partnership and strong interpersonal skills are needed.

Responsibilities

- Design and implementation of FPGAs.
- Participate in the architecture definition, implementation and verification phases.
- Detailed design specification and test plan development.
- Develop and implement block level RTL, perform synthesis and achieve timing closure.
- Work with multi-functional teams (hardware, software, diagnostics and signal integrity groups).
- Assist in complex subsystem level lab bring-up, integration, and unit test validation.
- Contribution to the design process adoption with in the team.

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