RTL Design Engineer – FPGA High-Speed Connectivity IP
AMD · Hyderabad · 4+ yrs experience · Posted 2026-07-10
Tech stack: C, C++, Python
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About the role
AMD is seeking a highly motivated RTL Design Engineer to join our FPGA Connectivity IP team. In this role, you will be responsible for the architecture, design, development, and validation of high-performance RTL IPs that enable next-generation FPGA connectivity solutions. You will contribute to the development of advanced High-Speed I/O subsystems and play a key role in delivering innovative features for AMD’s industry-leading FPGA products.
Working in a collaborative, global engineering environment, you will participate throughout the product development lifecycle—from requirements definition and microarchitecture development to RTL implementation, verification, and silicon enablement.
The ideal candidate is a skilled RTL Design Engineer with strong expertise in digital design, FPGA architecture, and high-speed connectivity protocols. You possess a solid understanding of AMD/Xilinx FPGA architecture and hands-on experience developing high-quality RTL designs for complex SoCs or FPGA-based systems.
You thrive in a fast-paced environment, enjoy tackling challenging technical problems, and are passionate about developing innovative connectivity solutions.
requires close collaboration with architecture, verification, software, and system teams across multiple geographies.
Responsibilities:
- AMD is seeking a highly motivated RTL Design Engineer to join our FPGA Connectivity IP team. In this role, you will be responsible for the architecture, design, development, and validation of high-performance RTL IPs that enable next-generation FPGA connectivity solutions. You will contribute to the development of advanced High-Speed I/O subsystems and play a key role in delivering innovative features for AMD’s industry-leading FPGA products.
- Working in a collaborative, global engineering environment, you will participate throughout the product development lifecycle—from
Qualifications:
- Strong knowledge of system-level architecture including buses like AXI, bridges, memory controllers, High Speed serial connectivity, etc
- Strong in digital design, micro architecture, RTL development
- Strong in VHDL/Verilog, System C, system debug, timing analysis
- Hands on experience with AMD/Xilinx FPGA device and Vivado toolchain.
- Hands on experience with architecting / micro-architecture / detailed design from functional specifications.
- Lint, CDC, synthesis flow and static timing flows, formal checking, etc. experience.
- Working knowledge / experience C++, TCL, Perl, Python is required
- Has a solid desire to learn and explore new technologies.
- Ability to develop longer-range project plans and schedules to complete complex projects or new product development.
- Ability to effectively communicate with customers about existing and new product directions and technology.
- Strong communication and presentation skills.
- Close collaboration with different teams across various time zones.
- Bachelor's or Master's degree in computer engineering/Electrical/Electronic Engineering with 4+ years of exp
Qualifications
- Strong knowledge of system-level architecture including buses like AXI, bridges, memory controllers, High Speed serial connectivity, etc
- Strong in digital design, micro architecture, RTL development
- Strong in VHDL/Verilog, System C, system debug, timing analysis
- Hands on experience with AMD/Xilinx FPGA device and Vivado toolchain.
- Hands on experience with architecting / micro-architecture / detailed design from functional specifications.
- Lint, CDC, synthesis flow and static timing flows, formal checking, etc. experience.
- Working knowledge / experience C++, TCL, Perl, Python is required
- Has a solid desire to learn and explore new technologies.
- Ability to develop longer-range project plans and schedules to complete complex projects or new product development.
- Ability to effectively communicate with customers about existing and new product directions and technology.
- Strong communication and presentation skills.
- Close collaboration with different teams across various time zones.
- Bachelor's or Master's degree in computer engineering/Electrical/Electronic Engineering with 4+ years of exp
Responsibilities
- AMD is seeking a highly motivated RTL Design Engineer to join our FPGA Connectivity IP team.
- In this role, you will be responsible for the architecture, design, development, and validation of high-performance RTL IPs that enable next-generation FPGA connectivity solutions.
- You will contribute to the development of advanced High-Speed I/O subsystems and play a key role in delivering innovative features for AMD’s industry-leading FPGA products.
- Working in a collaborative, global engineering environment, you will participate throughout the product development lifecycle—from